GV

GeezerVison

The World Wide Web, restored to 800 pixels of glory.

Home|About|Gaming cabinet|Archives|How it works|Starter sites

On this site

  • The Linux Kernel
  • Development process
  • Submitting patches
  • Code of conduct
  • Maintainer handbook
  • All development-process docs
  • Core API
  • Driver APIs
  • Subsystems
  • Input Documentation
  • Human Interface Devices (HID)
  • Sound Subsystem Documentation
  • GPU Driver Developer’s Guide
  • Frame Buffer

This view

  • Original page
  • New address

GeezerVison is showing docs.kernel.org — GPU Driver Documentation — The Linux Kernel documentation

GPU Driver Documentation¶

  • drm/amdgpu AMDgpu driver
    • Core Driver Infrastructure
      • GPU Hardware Structure
      • GFX, Compute, and SDMA Overall Behavior
      • Driver Structure
      • Memory Domains
      • Buffer Objects
      • PRIME Buffer Sharing
      • MMU Notifier
      • AMDGPU Virtual Memory
      • Interrupt Handling
      • IP Blocks
    • Ring Buffer
      • Enforce Isolation
      • Ring Operations
    • AMD Hardware Components Information per Product
      • Accelerated Processing Units (APU) Info
      • Discrete GPU Info
    • Module Parameters
    • drm/amdgpu - Graphics and Compute (GC)
      • Graphics (GFX) and Compute Microcontrollers
    • drm/amd/display - Display Core (DC)
      • DC Code validation
      • DC Information
    • User Mode Queues
      • Introduction
      • Theory of Operation
      • Memory Management
      • Interaction with Kernel Queues
      • Queue Resets
      • IOCTL Interfaces
      • Kernel and User Queues
    • dGPU firmware flashing
      • IFWI
      • USB-C PD F/W
      • sysfs files
    • AMDGPU XGMI Support
    • AMDGPU RAS Support
      • RAS debugfs/sysfs Control and Error Injection Interfaces
      • RAS Reboot Behavior for Unrecoverable Errors
      • RAS Error Count sysfs Interface
      • RAS EEPROM debugfs Interface
      • RAS VRAM Bad Pages sysfs Interface
      • Sample Code
    • GPU Power/Thermal Controls and Monitoring
      • HWMON Interfaces
      • GPU sysfs Power State Interfaces
      • GFXOFF
    • Misc AMDGPU driver information
      • GPU Product Information
      • GPU Memory Usage Information
      • PCIe Accounting Information
      • GPU SmartShift Information
      • UMA Carveout
    • GPU Debugging
      • General Debugging Options
      • GPUVM Debugging
      • Decoding a GPUVM Page Fault
      • UMR
      • Debugging backlight brightness
    • AMDGPU DebugFS
      • DebugFS Files
    • AMDGPU Process Isolation
      • Process Isolation
      • Cleaner Shader Execution
    • AMDGPU Glossary
    • UALink Support
      • Overview
      • User Interface
      • Device to Device Communications
    • Peak Tops Limiter (PTL) sysfs Interface
      • Overview
      • PTL sysfs files
      • PTL Enable/Disable
      • PTL Format (Preferred Data Formats)
      • Supported Formats
      • Behavioral Notes
      • Implementation
  • drm/i915 Intel GFX Driver
    • Core Driver Infrastructure
      • Runtime Power Management
      • Interrupt Handling
      • Intel GVT-g Guest Support(vGPU)
      • Intel GVT-g Host Support(vGPU device model)
      • Workarounds
    • GT Programming
      • Multicast/Replicated (MCR) Registers
    • Memory Management and Command Submission
      • Intel GPU Basics
      • Locking Guidelines
      • GEM BO Management Implementation Details
      • Buffer Object Eviction
      • Buffer Object Memory Shrinking
      • Batchbuffer Parsing
      • User Batchbuffer Execution
      • Scheduling
      • Logical Rings, Logical Ring Contexts and Execlists
      • Global GTT views
      • GTT Fences and Swizzling
      • Object Tiling IOCTLs
      • Protected Objects
    • Microcontrollers
      • WOPCM
      • GuC
      • HuC
      • DMC
    • Tracing
      • i915_ppgtt_create and i915_ppgtt_release
      • i915_context_create and i915_context_free
    • Perf
      • Overview
      • Comparison with Core Perf
      • i915 Driver Entry Points
      • i915 Perf Stream
      • i915 Perf Observation Architecture Stream
      • Other i915 Perf Internals
    • Style
      • Register macro definition style
    • i915 DRM client usage stats implementation
  • drm/imagination PowerVR Graphics Driver
    • Contents
      • UAPI
  • Intel Display Driver
    • Asynchronous Page Flip
    • Atomic Modeset Support
    • High Definition Audio
    • Intel HDMI LPE Audio Support
    • Content Adaptive Sharpness Filter (CASF)
    • Display clocks
    • Common Primary Timing Generator (CMTG)
    • DMC Firmware Support
    • DMC Flip Queue
    • DMC wakelock support
    • DPIO
    • Display PLLs
    • Display Refresh Rate Switching (DRRS)
    • Display State Buffer
    • Frame Buffer Compression (FBC)
    • Display FIFO Underrun Reporting
    • Frontbuffer Tracking
    • Hotplug
    • DisplayPort Link Training
      • Recovery sequence and userspace notification
      • Contexts
      • State transition summary
      • Recovery flows
    • DisplayPort Link Capabilities
      • Locking
      • Iterating and restricting link configurations
      • Terminology
    • Atomic Plane Helpers
    • Panel Self Refresh PSR (PSR/SRD)
    • Synopsis PHY support
    • Video BIOS Table (VBT)
  • drm/mcde ST-Ericsson MCDE Multi-channel display engine
  • drm/meson AmLogic Meson Video Processing Unit
    • Video Processing Unit
    • Video Input Unit
    • Video Post Processing
    • Video Encoder
    • Video Clocks
    • HDMI Video Output
  • drm/nouveau NVIDIA GPU Driver
    • NVKM: NVIDIA Kernel Manager
      • GSP Support
  • drm/pl111 ARM PrimeCell PL110 and PL111 CLCD Driver
  • drm/tegra NVIDIA Tegra GPU and display driver
    • Driver Infrastructure
      • Host1x Infrastructure Reference
      • Host1x Syncpoint Reference
    • KMS driver
      • Display Controllers
      • Outputs
    • Userspace Interface
      • GEM Buffers
      • Syncpoints
      • Command Stream Submission
  • drm/tve200 Faraday TV Encoder 200
  • drm/v3d Broadcom V3D Graphics Driver
    • GPU buffer object (BO) management
      • Address space management
      • GPU Scheduling
    • Interrupts
  • drm/vc4 Broadcom VC4 Graphics Driver
    • Display Hardware Handling
      • Pixel Valve (DRM CRTC)
      • HVS
      • HVS planes
      • HDMI encoder
      • DSI encoder
      • DPI encoder
      • VEC (Composite TV out) encoder
    • KUnit Tests
    • Memory Management and 3D Command Submission
      • GPU buffer object (BO) management
      • V3D binner command list (BCL) validation
      • V3D render command list (RCL) generation
      • Shader validator for VC4
      • V3D Interrupts
  • drm/vkms Virtual Kernel Modesetting
    • Setup
    • Configuring With Configfs
    • Testing With IGT
    • Testing With KUnit
    • TODO
      • IGT better support
      • Add Plane Features
      • Runtime Configuration
      • Writeback support
      • Output Features
      • CRC API Improvements
      • Atomic Check using eBPF
  • drm/bridge/dw-hdmi Synopsys DesignWare HDMI Controller
    • Synopsys DesignWare HDMI Controller
      • Supported Input Formats and Encodings
  • drm/xen-front Xen para-virtualized frontend driver
    • Driver modes of operation in terms of display buffers used
      • Buffers allocated by the frontend driver
      • Buffers allocated by the backend
    • Driver limitations
  • drm/xe Intel GFX Driver
    • Memory Management
      • BO management
      • BO creation
      • BO validation
      • BO eviction / moving
      • Future work
      • GGTT
      • Pagetable building
    • Map Layer
    • Migrate Layer
      • Special VM details
      • Bind jobs
      • Copy / clear jobs
      • Future work
      • Requirements
      • Fixed size jobs
      • Semaphores
      • Ring layout of a ULLS job
      • Submission fast path
      • Enter / exit
      • Job state
    • Execution Queue
      • Multi Queue Group
      • Multi Queue Group GuC interface
      • Internal API
    • Command submission
      • Flow
    • Runtime Power Management
      • Internal API
    • Xe GT Frequency Management
      • Internal API
    • Pcode
      • Internal API
    • Survivability Mode
      • Boot Survivability
      • Runtime Survivability
    • GT Multicast/Replicated (MCR) Register Support
      • Internal API
    • Hardware workarounds
      • Internal API
    • Register Table Processing
      • Internal API
    • Firmware
      • Firmware Layout
      • Write Once Protected Content Memory (WOPCM) Layout
      • GuC CTB Blob
      • GuC Power Conservation (PC)
      • PCIe Gen5 Limitations
      • Internal API
    • Multi-tile Devices
      • Internal API
    • Debugging
    • Xe Device Coredump
      • Internal API
    • Xe Device Wedging
      • Case: Firmware Flash
    • GPU Health Indicator
    • Xe DRM client usage stats implementation
    • Xe Configfs
      • Overview
      • Create devices
      • Configure Attributes
      • Remove devices
      • Internal API
    • Xe GT Statistics
      • Overview
      • Reading statistics
      • Resetting statistics
    • Xe SIGID
      • What SIGID stands for
      • Numbering
      • Why this exists
      • What a SIGID is not
      • When to use SIGID logging
      • SIGID log output (dmesg vs. the machine record)
      • How to pick a SIGID (the uniqueness rule)
      • Scope: software vs hardware emitted signatures
      • Signature Identifiers
  • Arm Framebuffer Compression (AFBC)
    • Components and Ordering
    • Number of Planes
    • Cross-device interoperability
  • drm/komeda Arm display driver
    • Overview of D71 like display IPs
      • Layer
      • Scaler
      • Compositor (compiz)
      • Writeback Layer (wb_layer)
      • Post image processor (improc)
      • Timing controller (timing_ctrlr)
      • Merger
      • Splitter
    • Possible D71 Pipeline usage
      • Single pipeline data flow
      • Dual pipeline with Slave enabled
      • Sub-pipelines for input and output
    • Komeda Resource abstraction
      • struct komeda_pipeline/component
    • Resource discovery and initialization
    • Format handling
    • Attach komeda_dev to DRM-KMS
      • How to map plane to Layer(input) pipeline
      • Make component/pipeline to be drm_private_obj
      • Tracking component_state/pipeline_state by drm_atomic_commit
      • komeda component validation
      • komeda_kms Abstraction
      • komde_kms Functions
    • Build komeda to be a Linux module driver
  • drm/Panfrost Mali Driver
    • Panfrost DRM client usage stats implementation
  • drm/Panthor CSF driver
    • Panthor DRM client usage stats implementation
  • Xilinx ZynqMP Ultrascale+ DisplayPort Subsystem
    • debugfs
    • Internals
  • nova NVIDIA GPU drivers
    • Guidelines
      • Language
      • Documentation
      • Acceptance Criteria
    • nova-core
      • Guidelines
      • Task List
      • VBIOS
      • Device Initialization (devinit)
      • FSP (Foundation Security Processor) and Secure Boot
      • FWSEC (Firmware Security)
      • Falcon (FAst Logic Controller)
      • TLV Tags in Nova Firmware Images
      • PRAMIN aperture mechanism
      • GPU interrupt handling: GIN and the GSP event
©The kernel development community. | Powered by Sphinx 5.3.0 & Alabaster 0.7.16 | Page source
You are visitor 01402503 — GeezerVison does not store the pages you look up.
Best viewed with Netscape Navigator 4.7 or Internet Explorer 6 at 800×600. No cookies required.