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ARM Cortex-A8

Cortex-A8 is commonly incorporated into SoCs, such as this Freescale i.MX50; the chip is seen on an e-reader's main logic board.
General information
Launched	2005
Designed by	ARM Holdings
Common manufacturer	TSMC
Performance
Max. CPU clock rate	0.6 GHz  to at least 1.0 GHz[1]
Physical specifications
Cores	1
Cache
L1 cache	32 KiB/32 KiB
L2 cache	512 KiB
Architecture and classification
Instruction set	ARMv7-A

The ARM Cortex-A8 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture.

Compared to the ARM11, the Cortex-A8 is a dual-issue superscalar design, and is capable of at most twice the instructions per cycle. The Cortex-A8 was the first Cortex design to be adopted on a large scale in consumer devices.^[2]

Key features of the Cortex-A8 core are:

• Frequency from 600 MHz to 1 GHz and above
• Superscalar dual-issue microarchitecture
• NEON SIMD instruction set extension^[3]
• 13-stage integer pipeline and 10-stage NEON pipeline^[4]
• VFPv3 floating-point unit
• Thumb-2 instruction set encoding
• Jazelle RCT (also known as ThumbEE instruction set)
• Advanced branch prediction unit with >95% accuracy
• Integrated level 2 Cache (0–4 MiB)
• 2.0 DMIPS/MHz

Several system-on-chips (SoC) have implemented the Cortex-A8 core, including:

• Allwinner A1X
• Apple A4
• Freescale Semiconductor i.MX51^[5]
• Rockchip RK2918, RK2906^[6]
• Samsung Exynos 3110
• TI OMAP3
• TI Sitara ARM Processors
• Conexant CX92755^[7]

• ARM architecture
• Comparison of ARMv7-A cores
• JTAG
• List of applications of ARM cores
• List of ARM cores

ARM Holdings

• Official website
• ARM Cortex-A8 Technical Reference Manuals