Integrated circuits and certain other electronic components are put into protective packages to allow easy handling and assembly onto printed circuit boards and to protect the devices from damage. A very large number of package types exist. Some package types have standardized dimensions and tolerances, and are registered with trade industry associations such as JEDEC and Pro Electron. Other types are proprietary designations that may be made by only one or two manufacturers. Integrated circuit packaging is the last assembly process before testing and shipping devices to customers.
Occasionally specially-processed integrated circuit dies are prepared for direct connections to a substrate without an intermediate header or carrier. In flip chip systems the IC is connected by solder bumps to a substrate. In beam-lead technology, the metallized pads that would be used for wire bonding connections in a conventional chip are thickened and extended to allow external connections to the circuit. Assemblies using "bare" chips have additional packaging or filling with epoxy to protect the devices from moisture.
Through-hole technology uses holes drilled through the printed circuit board (PCB) for mounting the components. The component has leads that are soldered to pads on the PCB to electrically and mechanically connect them to the PCB.
Three 14-pin (DIP14) plastic dual in-line packages containing IC chips.
0.1in (2.54mm) pin spacing, rows 0.3in (7.62mm) or 0.6in (15.24mm) apart. Other row spacings are used much less frequently, like 0.4in (10.2mm) and 0.9in (22.9mm).
A chip carrier is a rectangular package with contacts on all four edges. Leaded chip carriers have metal leads wrapped around the edge of the package, in the shape of a letter J. Leadless chip carriers have metal pads on the edges. Chip carrier packages may be made of ceramic or plastic and are usually secured to a printed circuit board by soldering, though sockets can be used for testing.
IC packaged in transparent packaging used in optical sensor
Small outline packages
A small outline integrated circuit (SOIC) is a surface-mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent dual in-line package (DIP), with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs.
According to IPC's standard J-STD-012, Implementation of Flip Chip and Chip Scale Technology, in order to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die and it must be a single-die, direct surface mountable package. Another criterion that is often applied to qualify these packages as CSPs is their ball pitch should be no more than 1 mm.
Example WL-CSP devices sitting on the face of a U.S. penny. A SOT-23 device is shown (top) for comparison.
A WL-CSP or WLCSP package is just a bare die with a redistribution layer (or I/O pitch) to rearrange the pins or contacts on the die so that they can be big enough and have sufficient spacing so that they can be handled just like a BGA package.[19]
PMCP
Power mount CSP (chip-scale package)
Variation of WLCSP, for power devices like MOSFETs. Made by Panasonic.[20]
Bare die supplied without a package. It is mounted directly to the PCB using bonding wires and covered with a blob of black Epoxy.[22] Also used for LEDs. In LEDs, transparent epoxy or a silicon caulk-like material that may contain a phosphor is poured into a mold containing the LED(s) and cured. The mold forms part of the package.
COF
Chip-on-flex
Variation of COB, where a chip is mounted directly to a flex circuit. Unlike COB, it may not use wires nor be covered with epoxy, using underfill instead.
Example of component sizes, metric and imperial codes and comparison includedComposite image of a 11×44 LED matrix lapel name tag display using 1608/0603-type SMD LEDs. Top: A little over half of the 21×86 mm display. Center: Close-up of LEDs in ambient light. Bottom: LEDs in their own red light.SMD capacitors (on the left) with two through-hole capacitors (on the right)
Surface-mount components are usually smaller than their counterparts with leads, and are designed to be handled by machines rather than by humans. The electronics industry has standardized package shapes and sizes (the leading standardisation body is JEDEC).
The codes given in the chart below usually tell the length and width of the components in tenths of millimeters or hundredths of inches. For example, a metric 2520 component is 2.5mm by 2.0mm which corresponds roughly to 0.10 inches by 0.08 inches (hence, imperial size is 1008). Exceptions occur for imperial in the two smallest rectangular passive sizes. The metric codes still represent the dimensions in mm, even though the imperial size codes are no longer aligned. Problematically, some manufacturers are developing metric 0201 components with dimensions of 0.25mm ×0.125mm (0.0098in ×0.0049in),[32] but the imperial 01005 name is already being used for the 0.4mm ×0.2mm (0.0157in ×0.0079in) package. These increasingly small sizes, especially 0201 and 01005, can sometimes be a challenge from a manufacturability or reliability perspective.[33]
DPAK (TO-252, SOT-428): Discrete Packaging. Developed by Motorola to house higher powered devices. Comes in three[64] or five-terminal[65] versions.
D2PAK (TO-263, SOT-404): Bigger than the DPAK; basically a surface mount equivalent of the TO220 through-hole package. Comes in 3, 5, 6, 7, 8 or 9-terminal versions.[66]
Metric quad flat-pack (MQFP): a QFP package with metric pin distribution
Thin quad flat-pack (TQFP), a thinner version of LQFP
Quad flat no-lead (QFN): smaller footprint than leaded equivalent
Leadless chip carrier (LCC): contacts are recessed vertically to "wick-in" solder. Common in aviation electronics because of robustness to mechanical vibration.
Micro leadframe package (MLP, MLF): with a 0.5mm contact pitch, no leads (same as QFN)
Power quad flat no-lead (PQFN): with exposed die-pads for heatsinking
Grid arrays
Ball grid array (BGA): A square or rectangular array of solder balls on one surface, ball spacing typically 1.27mm (0.050in)
Fine-pitch ball grid array (FBGA): A square or rectangular array of solder balls on one surface
Low-profile fine-pitch ball grid array (LFBGA): A square or rectangular array of solder balls on one surface, ball spacing typically 0.8mm
Micro ball grid array (μBGA): Ball spacing less than 1mm
Land grid array (LGA): An array of bare lands only. Similar to in appearance to QFN, but mating is by spring pins within a socket rather than solder.
Column grid array (CGA): A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern.
Ceramic column grid array (CCGA): A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern. The body of the component is ceramic.
Lead-less package (LLP): A package with metric pin distribution (0.5mm pitch).
Non-packaged devices
Although surface-mount, these devices require specific process for assembly.
Chip-on-board (COB), a bare silicon chip, that is usually an integrated circuit, is supplied without a package (which is usually a lead frame overmolded with epoxy) and is attached, often with epoxy, directly to a circuit board. The chip is then wire bonded and protected from mechanical damage and contamination by an epoxy "glob-top".
Chip-on-flex (COF), a variation of COB, where a chip is mounted directly to a flex circuit. Tape-automated bonding process is also a chip-on-flex process as well.
Chip-on-glass (COG), a variation of COB, where a chip, typically a liquid crystal display (LCD) controller, is mounted directly on glass.
Chip-on-wire (COW), a variation of COB, where a chip, typically a LED or RFID chip, is mounted directly on wire, thus making it a very thin and flexible wire. Such wire may then be covered with cotton, glass or other materials to make into smart textiles or electronic textiles.
There are often subtle variations in package details from manufacturer to manufacturer, and even though standard designations are used, designers need to confirm dimensions when laying out printed circuit boards.
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