The MCS-48microcontroller series, Intel's first microcontroller, was originally released in 1976. Its first members were 8048, 8035 and 8748. The 8048[1] is arguably the most prominent member of the family.
Initially, this family was produced using NMOS (n-type metal–oxide–semiconductor) technology. In the early 1980s, it became available in CMOS technology. It was manufactured into the 1990s to support older designs that still used it.
The MCS-48 series has a modified Harvard architecture, with internal or external program ROM and 64 to 256 bytes of internal (on-chip) RAM. The I/O is mapped into its own address space, separate from programs and data.
Though the MCS-48 series was eventually replaced by the very successful MCS-51 series, it remained quite popular even by the year 2000 due to its low cost, wide availability, memory-efficient one-byte instruction set, and mature development tools. Because of this, the architecture is still used in high-volume, cost-sensitive consumer electronics devices such as TV remotes, computer keyboards, and toys.
Note: All other programmer-visible registers and stack are allocated in RAM.
The MCS-48 series was commonly used in computer and terminal keyboards, converting key presses into protocols that can be understood by digital circuits. This also allows the possibility of serial communication, reducing the number of conductors needed in cables on external keyboards. The 8048 has been used in this application since its introduction in 1978.
The Tandy/Radio Shack TRS-80 Model II, released in 1979, used the 8021 in its keyboard.[3] The 8021 processor scans the key matrix, converts switch closures to an 8-bit code and then transmits that code serially to the keyboard interface on the main system. It will also accept commands to turn indicator LEDs on or off. The 8021 was also used in the keyboards for the TRS-80 Model 12, 12B, 16, 16B and the Tandy 6000/6000HD.[4]
The original IBM PC keyboard and the keyboard for its precursor the IBM System/23 Datamaster used an 8048 as its internal microcontroller.[5] The PC AT replaced the PC's Intel 8255 peripheral interface chip at I/O port addresses 0x60–63 with an 8042 accessible through port addresses 0x60 and 0x64.[6] As well as managing the keyboard interface, the 8042 controlled the A20 line gating function for the AT's Intel 80286 CPU and could be commanded by software to reset the 80286 (unlike the 80386 and later processors, the 80286 had no way of switching from protected mode back to real mode except by being reset). Later PC compatibles integrate the 8042's functions into their super I/O devices.
All MCS-48 instructions are one or two bytes long, with 70% of the instructions being one byte. The MCS-48 can address 4096 bytes of program memory, 256 bytes of RAM, 256 bytes of external memory, and eight port I/O addresses. Most arithmetic and logical operations use the accumulator as a parameter and destination. Eight memory locations are mapped as registers so they can be addressed by a 3-bit field embedded in many instructions. Two of those registers can be used as memory pointers. Conditional branches can only access the current 256-byte page. JMP and CALL can directly access 2048 locations. To access the entire 4096-byte program space, a clunky select memory bank instruction must be used. The RET instruction can, however, return anywhere in the address space. Interrupts are well supported with alternate registers for quick context switches and the ability to restore the state of the flags with the RETR instruction. All instructions execute in one or two machine cycles. Each machine cycle takes 15 external clocks.[2]
If I input = 0 then PC0-7 ← addr (test interrupt input low)
1
0
0
0
1
0
0
0
data
ORL BUS,#
2
A ← bus ∨ #
1
0
0
0
1
0
PP
data
ORL Pp,#
2
A ← Port(p) ∨ # (Ports 1-2)
1
0
0
0
1
PP
—
ORLD Pp,A
2
8243 Port(p) ← 8243 Port(p) ∨ A0-3 (Ports 4-7)
1
0
0
1
0
0
0
R
—
MOVX @Rr,A
2
external @Rr ← A (@R0, @R1 only)
1
0
0
1
0
0
1
1
—
RETR
2
SP ← SP - 1; PC ← (SP); PSW4-7 ← (SP)
1
0
N
1
0
1
0
1
—
CPL Fn
1
Fn ← ¬Fn
1
0
0
1
0
1
1
1
—
CLR C
1
C ← 0
1
0
0
1
1
0
0
0
data
ANL BUS,#
2
A ← bus ∧ #
1
0
0
1
1
0
PP
data
ANL Pp,#
2
A ← Port(p) ∧ # (Ports 1-2)
1
0
0
1
1
PP
—
ANLD Pp,A
2
8243 Port(p) ← 8243 Port(p) ∧ A0-3 (Ports 4-7)
1
0
1
0
0
0
1
1
—
MOVP A,@A
2
A ← ROM(PC8-11:A) (read program memory)
1
0
1
0
0
1
1
1
—
CPL C
1
C ← ¬C
1
0
1
1
0
0
1
1
—
JMPP @A
2
PC0-7 ← A (indirect JMP)
1
0
1
1
0
1
1
0
addr
JF0 addr
2
If F0 = 1 then PC0-7 ← addr
1
1
0
N
0
1
0
1
—
SEL RBn
1
BS ← n (select register bank)
1
1
0
0
0
1
1
0
addr
JZ addr
2
If A = 0 then PC0-7 ← addr
1
1
0
0
0
1
1
1
—
MOV A,PSW
1
A ← PSW
1
1
0
1
0
1
1
1
—
MOV PSW,A
1
PSW ← A
1
1
1
0
0
0
1
1
—
MOVP3 A,@A
2
A ← ROM(0011:A) (read page 3 program memory)
1
1
1
N
0
1
0
1
—
SEL MBn
1
DBF ← n (select memory bank: PC11)
1
1
1
F
0
1
1
0
addr
JNC JC addr
2
If F = C then PC0-7 ← addr
1
1
1
0
0
1
1
1
—
RL A
1
A1-7 ← A0-6; A0 ← A7
1
1
1
0
1
RRR
addr
DJNZ Rr,addr
2
Rr ← Rr - 1; If Rr ≠ 0 then PC0-7 ← addr
1
1
1
1
0
1
1
1
—
RLC A
1
C ← A7; A1-7 ← A0-6; A0 ← C
7
6
5
4
3
2
1
0
Operand
Mnemonic
Cycles
Description
RRR or R
3
2
1
0
ALU
ALUI #immed
R0 @R0
0
0
0
0
ADD A,# (A ← A + #)
R1 @R1
0
0
0
1
INC arg (arg ← arg + 1)
ADDC A,# (A ← A + # + C)
R2
0
0
1
0
XCH A,arg (A ↔ arg)
MOV R,# (R ← #)
R3
0
0
1
1
R4
0
1
0
0
ORL A,arg (A ← A ∨ arg)
ORL A,# (A ← A ∨ #)
R5
0
1
0
1
ANL A,arg (A ← A ∧ arg)
ANL A,# (A ← A ∧ #)
R6
0
1
1
0
ADD A,arg (A ← A + arg)
R7
0
1
1
1
ADDC A,arg (A ← A + arg + C)
1
0
1
0
MOV arg,A (arg ← A)
1
1
0
0
DEC arg (arg ← arg - 1)
1
1
0
1
XRL A,arg (A ← A ⊻ arg)
XRL A,# (A ← A ⊻ #)
1
1
1
1
MOV A,arg (A ← arg)
RRR or R
3
2
1
0
ALU
ALUI #immed
Example code
The following assembler source code is for a subroutine named add32 that adds two 32-bit integers stored in little endian order. One addend is pointed to by R0 and the other addend and result are pointed to by R1.
; Add32 --; Add two 32-bit integers;; Entry registers; R0 - Address of first addend; R1 - Address of second addend and result; Altered registers; R0, R1, R2.ORG100h;Origin at 100hADD32:MOVR2,#32./8. ;number of bytes in 32 bitsCLRC;prepare C for ADDCADDLP:MOVA,@R0;Get first addendADDCA,@R1;Add second addend + CYMOV@R1,A;Store resultINCR0;Bump memory pointersINCR1DJNZR2,ADDLP;Loop R2 timesRETEND
Variants
An Intel 8049 microcontroller, as used in a HP3478A multimeter. This chip was manufactured in the second week of 1984.The 8749 with UV EPROMIntel P8242 - keyboard controller with Phoenix firmware for AT-compatible computersNational Semiconductor NS87P50D-6 – Second source for the 87P50 piggyback microcontroller
The 8049 has 2KB of masked ROM (the 8748 and 8749 had EPROM) that can be replaced with a 4KB external ROM, as well as 128bytes of RAM and 27I/O ports.[10] The microcontroller's oscillator block divides the clock input frequency by three and then further divides the result into five machine states. Using the 11MHz maximum crystal frequency will produce 0.73MIPS of single-cycle instructions. Some 70% of instructions are single-byte and single-cycle ones, but 30% need two cycles or two bytes, so its typical performance would be closer to 0.5MIPS.
The UPI-41 series is a variation of the MCS-48 intended for peripheral devices, meant to respond on-demand on a parallel bus. Due to this, a buffered parallel data-bus interface was built into these chips, and some op-code instructions were changed to enable operation of this interface.[12]
Universal Peripheral Interface
Device
Program memory
Data memory
Remarks
8041
1K × 8 ROM
64 × 8 RAM
Universal Peripheral Interface (UPI)
8041AH
1K × 8 ROM
128 × 8 RAM
UPI
8741A
1K × 8 EPROM
64 × 8 RAM
UPI, EPROM version of 8041
8741AH
1K × 8 OTP EPROM
128 × 8 RAM
UPI, OTP EPROM version of 8041AH
8042AH
2K × 8 ROM
256 × 8 RAM
UPI
8242
2K × 8 ROM
256 × 8 RAM
UPI, preprogrammed with keyboard controller firmware[13]
8742
2K × 8 EPROM
128 × 8 RAM
UPI, EPROM version
8742AH
2K × 8 OTP EPROM
256 × 8 RAM
UPI, OTP EPROM version of 8042AH
Derived microcontrollers
Philips Semiconductors (now NXP) owned a license to produce this series and developed their MAB8400-family based on this architecture. These were the first microcontrollers with an integrated I²C-interface and were used in the first Philips (Magnavox in the US) Compact Disc players (e.g. the CD-100).[14]
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