GeezerVison is showing github.com — deps: V8: cherry-pick 13192d6e10fa · nodejs/node@bc2ebb9
File treeExpand file treeCollapse file tree Open diff view settings Expand file treeCollapse file tree Open diff view settings Collapse file Copy file name to clipboardExpand all lines: common.gypi +1-1Lines changed: 1 addition & 1 deletion | Original file line number | Diff line number | Diff line change |
|---|
| 36 | 36 |
| 37 | 37 | # Reset this number to 0 on major V8 upgrades. | 38 | 38 | # Increment by one for each non-official patch applied to deps/v8. | 39 | | - 'v8_embedder_string': '-node.25', | | 39 | + 'v8_embedder_string': '-node.15', | 40 | 40 |
| 41 | 41 | ##### V8 defaults for Node.js ##### | 42 | 42 |
| |
Collapse file Copy file name to clipboardExpand all lines: deps/v8/src/builtins/riscv/builtins-riscv.cc +1-1Lines changed: 1 addition & 1 deletion | Original file line number | Diff line number | Diff line change |
|---|
@@ -1512,7 +1512,7 @@ static void Generate_InterpreterEnterBytecode(MacroAssembler* masm) { | 1512 | 1512 | // Set the return address to the correct point in the interpreter entry | 1513 | 1513 | // trampoline. | 1514 | 1514 | Label builtin_trampoline, trampoline_loaded; | 1515 | | - Smi interpreter_entry_return_pc_offset( | | 1515 | + Tagged<Smi> interpreter_entry_return_pc_offset( | 1516 | 1516 | masm->isolate()->heap()->interpreter_entry_return_pc_offset()); | 1517 | 1517 | DCHECK_NE(interpreter_entry_return_pc_offset, Smi::zero()); | 1518 | 1518 |
| |
Collapse file Copy file name to clipboardExpand all lines: deps/v8/src/codegen/riscv/assembler-riscv-inl.h +8-8Lines changed: 8 additions & 8 deletions | Original file line number | Diff line number | Diff line change |
|---|
@@ -128,9 +128,9 @@ Handle<HeapObject> Assembler::compressed_embedded_object_handle_at( | 128 | 128 | } | 129 | 129 |
| 130 | 130 | void Assembler::deserialization_set_special_target_at( | 131 | | - Address instruction_payload, Code code, Address target) { | | 131 | + Address instruction_payload, Tagged<Code> code, Address target) { | 132 | 132 | set_target_address_at(instruction_payload, | 133 | | - !code.is_null() ? code.constant_pool() : kNullAddress, | | 133 | + !code.is_null() ? code->constant_pool() : kNullAddress, | 134 | 134 | target); | 135 | 135 | } | 136 | 136 |
| @@ -159,12 +159,13 @@ void Assembler::deserialization_set_target_internal_reference_at( | 159 | 159 | } | 160 | 160 | } | 161 | 161 |
| 162 | | -HeapObject RelocInfo::target_object(PtrComprCageBase cage_base) { | | 162 | +Tagged<HeapObject> RelocInfo::target_object(PtrComprCageBase cage_base) { | 163 | 163 | DCHECK(IsCodeTarget(rmode_) || IsEmbeddedObjectMode(rmode_)); | 164 | 164 | if (IsCompressedEmbeddedObject(rmode_)) { | 165 | | - return HeapObject::cast(Object(V8HeapCompressionScheme::DecompressTagged( | 166 | | - cage_base, | 167 | | - Assembler::target_compressed_address_at(pc_, constant_pool_)))); | | 165 | + return HeapObject::cast( | | 166 | + Tagged<Object>(V8HeapCompressionScheme::DecompressTagged( | | 167 | + cage_base, | | 168 | + Assembler::target_compressed_address_at(pc_, constant_pool_)))); | 168 | 169 | } else { | 169 | 170 | return HeapObject::cast( | 170 | 171 | Object(Assembler::target_address_at(pc_, constant_pool_))); | @@ -186,8 +187,7 @@ Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) { | 186 | 187 | } | 187 | 188 | } | 188 | 189 |
| 189 | | -void RelocInfo::set_target_object(Heap* heap, HeapObject target, | 190 | | - WriteBarrierMode write_barrier_mode, | | 190 | +void RelocInfo::set_target_object(Tagged<HeapObject> target, | 191 | 191 | ICacheFlushMode icache_flush_mode) { | 192 | 192 | DCHECK(IsCodeTarget(rmode_) || IsEmbeddedObjectMode(rmode_)); | 193 | 193 | if (IsCompressedEmbeddedObject(rmode_)) { | |
Collapse file Copy file name to clipboardExpand all lines: deps/v8/src/codegen/riscv/assembler-riscv.h +1-1Lines changed: 1 addition & 1 deletion | Original file line number | Diff line number | Diff line change |
|---|
@@ -286,7 +286,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase, | 286 | 286 | // This is for calls and branches within generated code. The serializer | 287 | 287 | // has already deserialized the lui/ori instructions etc. | 288 | 288 | inline static void deserialization_set_special_target_at(Address location, | 289 | | - Code code, | | 289 | + Tagged<Code> code, | 290 | 290 | Address target); | 291 | 291 |
| 292 | 292 | // Get the size of the special target encoded at 'instruction_payload'. | |
Collapse file Copy file name to clipboardExpand all lines: deps/v8/src/execution/riscv/simulator-riscv.cc +4-4Lines changed: 4 additions & 4 deletions | Original file line number | Diff line number | Diff line change |
|---|
@@ -1781,7 +1781,7 @@ void RiscvDebugger::Debug() { | 1781 | 1781 | sreg_t value; | 1782 | 1782 | StdoutStream os; | 1783 | 1783 | if (GetValue(arg1, &value)) { | 1784 | | - Object obj(value); | | 1784 | + Tagged<Object> obj(value); | 1785 | 1785 | os << arg1 << ": \n"; | 1786 | 1786 | #ifdef DEBUG | 1787 | 1787 | obj.Print(os); | @@ -1830,7 +1830,7 @@ void RiscvDebugger::Debug() { | 1830 | 1830 | PrintF(" 0x%012" PRIxPTR " : 0x%016" REGIx_FORMAT | 1831 | 1831 | " %14" REGId_FORMAT " ", | 1832 | 1832 | reinterpret_cast<intptr_t>(cur), *cur, *cur); | 1833 | | - Object obj(*cur); | | 1833 | + Tagged<Object> obj(*cur); | 1834 | 1834 | Heap* current_heap = sim_->isolate_->heap(); | 1835 | 1835 | if (obj.IsSmi() || | 1836 | 1836 | IsValidHeapObject(current_heap, HeapObject::cast(obj))) { | @@ -4692,7 +4692,7 @@ bool Simulator::DecodeRvvVS() { | 4692 | 4692 | Builtin Simulator::LookUp(Address pc) { | 4693 | 4693 | for (Builtin builtin = Builtins::kFirst; builtin <= Builtins::kLast; | 4694 | 4694 | ++builtin) { | 4695 | | - if (builtins_.code(builtin).contains(isolate_, pc)) return builtin; | | 4695 | + if (builtins_.code(builtin)->contains(isolate_, pc)) return builtin; | 4696 | 4696 | } | 4697 | 4697 | return Builtin::kNoBuiltinId; | 4698 | 4698 | } | @@ -4709,7 +4709,7 @@ void Simulator::DecodeRVIType() { | 4709 | 4709 | if (builtin != Builtin::kNoBuiltinId) { | 4710 | 4710 | auto code = builtins_.code(builtin); | 4711 | 4711 | if ((rs1_reg() != ra || imm12() != 0)) { | 4712 | | - if ((Address)get_pc() == code.InstructionStart()) { | | 4712 | + if ((Address)get_pc() == code->instruction_start()) { | 4713 | 4713 | sreg_t arg0 = get_register(a0); | 4714 | 4714 | sreg_t arg1 = get_register(a1); | 4715 | 4715 | sreg_t arg2 = get_register(a2); | |
Collapse file Copy file name to clipboardExpand all lines: deps/v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc +1-1Lines changed: 1 addition & 1 deletion | Original file line number | Diff line number | Diff line change |
|---|
@@ -1211,7 +1211,7 @@ static T* frame_entry_address(Address re_frame, int frame_offset) { | 1211 | 1211 | int64_t RegExpMacroAssemblerRISCV::CheckStackGuardState(Address* return_address, | 1212 | 1212 | Address raw_code, | 1213 | 1213 | Address re_frame) { | 1214 | | - InstructionStream re_code = InstructionStream::cast(Object(raw_code)); | | 1214 | + Tagged<InstructionStream> re_code = InstructionStream::cast(Object(raw_code)); | 1215 | 1215 | return NativeRegExpMacroAssembler::CheckStackGuardState( | 1216 | 1216 | frame_entry<Isolate*>(re_frame, kIsolateOffset), | 1217 | 1217 | static_cast<int>(frame_entry<int64_t>(re_frame, kStartIndexOffset)), | |
|