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GeezerVison is showing github.com — Revert "deps: fix zlib compilation for CPUs without SIMD features" · nodejs/node@c04e1df

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`‎deps/zlib/adler32_simd.c‎`

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-4Lines changed: 0 additions & 4 deletions

Original file line number	Diff line number	Diff line change
`@@ -50,13 +50,9 @@`
`50`	`50`	`#define NMAX 5552`
`51`	`51`
`52`	`52`	`#if defined(ADLER32_SIMD_SSSE3)`
`53`		`-#ifndef __GNUC__`
`54`		`-#define __attribute__()`
`55`		`-#endif`
`56`	`53`
`57`	`54`	`#include <tmmintrin.h>`
`58`	`55`
`59`		`-__attribute__((target("ssse3")))`
`60`	`56`	`uint32_t ZLIB_INTERNAL adler32_simd_( /* SSSE3 */`
`61`	`57`	`uint32_t adler,`
`62`	`58`	`const unsigned char *buf,`

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`‎deps/zlib/crc32_simd.c‎`

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-4Lines changed: 0 additions & 4 deletions

Original file line number	Diff line number	Diff line change
`@@ -8,9 +8,6 @@`
`8`	`8`	`#include "crc32_simd.h"`
`9`	`9`
`10`	`10`	`#if defined(CRC32_SIMD_SSE42_PCLMUL)`
`11`		`-#ifndef __GNUC__`
`12`		`-#define __attribute__()`
`13`		`-#endif`
`14`	`11`
`15`	`12`	`/*`
`16`	`13`	`* crc32_sse42_simd_(): compute the crc32 of the buffer, where the buffer`
`@@ -24,7 +21,6 @@`
`24`	`21`	`#include <smmintrin.h>`
`25`	`22`	`#include <wmmintrin.h>`
`26`	`23`
`27`		`-__attribute__((target("sse4.2,pclmul")))`
`28`	`24`	`uint32_t ZLIB_INTERNAL crc32_sse42_simd_( /* SSE4.2+PCLMUL */`
`29`	`25`	`const unsigned char *buf,`
`30`	`26`	`z_size_t len,`

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`‎deps/zlib/crc_folding.c‎`

Copy file name to clipboardExpand all lines: deps/zlib/crc_folding.c

-12Lines changed: 0 additions & 12 deletions

Original file line number	Diff line number	Diff line change
`@@ -25,10 +25,6 @@`
`25`	`25`	`#include <immintrin.h>`
`26`	`26`	`#include <wmmintrin.h>`
`27`	`27`
`28`		`-#ifndef __GNUC__`
`29`		`-#define __attribute__()`
`30`		`-#endif`
`31`		`-`
`32`	`28`	`#define CRC_LOAD(s) \`
`33`	`29`	`do { \`
`34`	`30`	`__m128i xmm_crc0 = _mm_loadu_si128((__m128i *)s->crc0 + 0);\`
`@@ -45,7 +41,6 @@`
`45`	`41`	`_mm_storeu_si128((__m128i *)s->crc0 + 4, xmm_crc_part);\`
`46`	`42`	`} while (0);`
`47`	`43`
`48`		`-__attribute__((target("sse4.2,pclmul")))`
`49`	`44`	`ZLIB_INTERNAL void crc_fold_init(deflate_state *const s)`
`50`	`45`	`{`
`51`	`46`	`CRC_LOAD(s)`
`@@ -60,7 +55,6 @@ ZLIB_INTERNAL void crc_fold_init(deflate_state *const s)`
`60`	`55`	`s->strm->adler = 0;`
`61`	`56`	`}`
`62`	`57`
`63`		`-__attribute__((target("sse4.2,pclmul")))`
`64`	`58`	`local void fold_1(deflate_state *const s,`
`65`	`59`	`__m128i xmm_crc0, __m128i xmm_crc1,`
`66`	`60`	`__m128i xmm_crc2, __m128i xmm_crc3)`
`@@ -87,7 +81,6 @@ local void fold_1(deflate_state *const s,`
`87`	`81`	`*xmm_crc3 = _mm_castps_si128(ps_res);`
`88`	`82`	`}`
`89`	`83`
`90`		`-__attribute__((target("sse4.2,pclmul")))`
`91`	`84`	`local void fold_2(deflate_state *const s,`
`92`	`85`	`__m128i xmm_crc0, __m128i xmm_crc1,`
`93`	`86`	`__m128i xmm_crc2, __m128i xmm_crc3)`
`@@ -122,7 +115,6 @@ local void fold_2(deflate_state *const s,`
`122`	`115`	`*xmm_crc3 = _mm_castps_si128(ps_res31);`
`123`	`116`	`}`
`124`	`117`
`125`		`-__attribute__((target("sse4.2,pclmul")))`
`126`	`118`	`local void fold_3(deflate_state *const s,`
`127`	`119`	`__m128i xmm_crc0, __m128i xmm_crc1,`
`128`	`120`	`__m128i xmm_crc2, __m128i xmm_crc3)`
`@@ -163,7 +155,6 @@ local void fold_3(deflate_state *const s,`
`163`	`155`	`*xmm_crc3 = _mm_castps_si128(ps_res32);`
`164`	`156`	`}`
`165`	`157`
`166`		`-__attribute__((target("sse4.2,pclmul")))`
`167`	`158`	`local void fold_4(deflate_state *const s,`
`168`	`159`	`__m128i xmm_crc0, __m128i xmm_crc1,`
`169`	`160`	`__m128i xmm_crc2, __m128i xmm_crc3)`
`@@ -230,7 +221,6 @@ local const unsigned zalign(32) pshufb_shf_table[60] = {`
`230`	`221`	`0x0201008f,0x06050403,0x0a090807,0x0e0d0c0b /* shl 1 (16 -15)/shr15*/`
`231`	`222`	`};`
`232`	`223`
`233`		`-__attribute__((target("sse4.2,pclmul")))`
`234`	`224`	`local void partial_fold(deflate_state *const s, const size_t len,`
`235`	`225`	`__m128i xmm_crc0, __m128i xmm_crc1,`
`236`	`226`	`__m128i xmm_crc2, __m128i xmm_crc3,`
`@@ -281,7 +271,6 @@ local void partial_fold(deflate_state *const s, const size_t len,`
`281`	`271`	`*xmm_crc3 = _mm_castps_si128(ps_res);`
`282`	`272`	`}`
`283`	`273`
`284`		`-__attribute__((target("sse4.2,pclmul")))`
`285`	`274`	`ZLIB_INTERNAL void crc_fold_copy(deflate_state *const s,`
`286`	`275`	`unsigned char dst, const unsigned char src, long len)`
`287`	`276`	`{`
`@@ -438,7 +427,6 @@ local const unsigned zalign(16) crc_mask2[4] = {`
`438`	`427`	`0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF`
`439`	`428`	`};`
`440`	`429`
`441`		`-__attribute__((target("sse4.2,pclmul")))`
`442`	`430`	`unsigned ZLIB_INTERNAL crc_fold_512to32(deflate_state *const s)`
`443`	`431`	`{`
`444`	`432`	`const __m128i xmm_mask = _mm_load_si128((__m128i *)crc_mask);`

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