|
5 | 5 |
|
6 | 6 | #include "src/base/build_config.h" |
7 | 7 |
|
8 | | -#if V8_HOST_ARCH_ARM |
| 8 | +// Check both {HOST_ARCH} and {TARGET_ARCH} to disable the functionality of this |
| 9 | +// file for cross-compilation. The reason is that the inline assembly code below |
| 10 | +// does not work for cross-compilation. |
| 11 | +#if V8_HOST_ARCH_ARM && V8_TARGET_ARCH_ARM |
9 | 12 | #include "src/codegen/arm/register-arm.h" |
10 | | -#elif V8_HOST_ARCH_ARM64 |
| 13 | +#elif V8_HOST_ARCH_ARM64 && V8_TARGET_ARCH_ARM64 |
11 | 14 | #include "src/codegen/arm64/register-arm64.h" |
12 | | -#elif V8_HOST_ARCH_IA32 |
| 15 | +#elif V8_HOST_ARCH_IA32 && V8_TARGET_ARCH_IA32 |
13 | 16 | #include "src/codegen/ia32/register-ia32.h" |
14 | | -#elif V8_HOST_ARCH_X64 |
| 17 | +#elif V8_HOST_ARCH_X64 && V8_TARGET_ARCH_X64 |
15 | 18 | #include "src/codegen/x64/register-x64.h" |
16 | | -#elif V8_HOST_ARCH_LOONG64 |
| 19 | +#elif V8_HOST_ARCH_LOONG64 && V8_TARGET_ARCH_LOONG64 |
17 | 20 | #include "src/codegen/loong64/register-loong64.h" |
18 | | -#elif V8_HOST_ARCH_MIPS |
| 21 | +#elif V8_HOST_ARCH_MIPS && V8_TARGET_ARCH_MIPS |
19 | 22 | #include "src/codegen/mips/register-mips.h" |
20 | | -#elif V8_HOST_ARCH_MIPS64 |
| 23 | +#elif V8_HOST_ARCH_MIPS64 && V8_TARGET_ARCH_MIPS64 |
21 | 24 | #include "src/codegen/mips64/register-mips64.h" |
22 | 25 | #endif |
23 | 26 |
|
@@ -26,14 +29,15 @@ namespace internal { |
26 | 29 |
|
27 | 30 | #if V8_CC_MSVC |
28 | 31 | // msvc only support inline assembly on x86 |
29 | | -#if V8_HOST_ARCH_IA32 |
| 32 | +#if V8_HOST_ARCH_IA32 && V8_TARGET_ARCH_IA32 |
30 | 33 | #define CLOBBER_REGISTER(R) __asm xorps R, R |
31 | 34 |
|
32 | 35 | #endif |
33 | 36 |
|
34 | 37 | #else // !V8_CC_MSVC |
35 | 38 |
|
36 | | -#if V8_HOST_ARCH_X64 || V8_HOST_ARCH_IA32 |
| 39 | +#if (V8_HOST_ARCH_X64 && V8_TARGET_ARCH_X64) || \ |
| 40 | + (V8_HOST_ARCH_IA32 && V8_TARGET_ARCH_IA32) |
37 | 41 | #define CLOBBER_REGISTER(R) \ |
38 | 42 | __asm__ volatile( \ |
39 | 43 | "xorps " \ |
@@ -42,20 +46,19 @@ namespace internal { |
42 | 46 | "%%" #R :: \ |
43 | 47 | :); |
44 | 48 |
|
45 | | -#elif V8_HOST_ARCH_ARM64 |
| 49 | +#elif V8_HOST_ARCH_ARM64 && V8_TARGET_ARCH_ARM64 |
46 | 50 | #define CLOBBER_REGISTER(R) __asm__ volatile("fmov " #R ",xzr" :::); |
47 | 51 |
|
48 | | -#elif V8_HOST_ARCH_LOONG64 |
| 52 | +#elif V8_HOST_ARCH_LOONG64 && V8_TARGET_ARCH_LOONG64 |
49 | 53 | #define CLOBBER_REGISTER(R) __asm__ volatile("movgr2fr.d $" #R ",$zero" :::); |
50 | 54 |
|
51 | | -#elif V8_HOST_ARCH_MIPS |
| 55 | +#elif V8_HOST_ARCH_MIPS && V8_TARGET_ARCH_MIPS |
52 | 56 | #define CLOBBER_USE_REGISTER(R) __asm__ volatile("mtc1 $zero,$" #R :::); |
53 | 57 |
|
54 | | -#elif V8_HOST_ARCH_MIPS64 |
| 58 | +#elif V8_HOST_ARCH_MIPS64 && V8_TARGET_ARCH_MIPS64 |
55 | 59 | #define CLOBBER_USE_REGISTER(R) __asm__ volatile("dmtc1 $zero,$" #R :::); |
56 | 60 |
|
57 | | -#endif // V8_HOST_ARCH_X64 || V8_HOST_ARCH_IA32 || V8_HOST_ARCH_ARM64 || |
58 | | - // V8_HOST_ARCH_LOONG64 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 |
| 61 | +#endif // V8_HOST_ARCH_XXX && V8_TARGET_ARCH_XXX |
59 | 62 |
|
60 | 63 | #endif // V8_CC_MSVC |
61 | 64 |
|
|