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GeezerVison is showing mips.com — IP Cores, A New Path for AI Compute

World Leading RISC-V IP, Software, and Custom Silicon for Physical AI

Scalable and open, designed with software in mind: MIPS Atlas Portfolio of Processor IP for the Physical AI signal chain — Sense, Think, Act, Communicate

In the Agentic AI Era, Compute Needs MIPS from Software to Silicon

Subsystems that Sense, Think, Act, Communicate
Custom silicon optimized for Physical AI for scalable, standards-based technology
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Virtual platform to evaluate IP and shift-left software-hardware co-design
Mission critical platforms for safety and low-latency event processing

In the Agentic AI Era, Compute Needs MIPS from Software to Silicon

Subsystems that Sense, Think, Act, Communicate
Custom silicon optimized for Physical AI for scalable, standards-based technology
Compute Needs MIPS 01
Virtual platform to evaluate IP and shift-left software-hardware co-design
Mission critical platforms for safety and low-latency event processing

Industry Leading AI & RISC-V Processor IP

Product Class

Atlas Processor IP Portfolio

AI Acceleration / Offload

Atlas S8200 Deterministic Performance In-Order CPU host, RVA23+, SMT, RVV, VME
ARC NPX6 Scalable NPU for Modern AI

Embedded Applications Processor

ARC RPX-100 64-bit superscalar MPU, RVA23; ASIL-B
Atlas P8700 4-Wide OOO,​ 2-Way SMT MPU, RVA20​; ASIL-B​

Real-Time Linux Processor

Atlas I8500 3-Wide In-Order,​ 4-Way SMT MPU, RVB23

High-Performance Microcontroller

Atlas M8500 Field-Oriented Control Algorithm, 32-bit MCU, RVM23, 4-way RTMT; ASIL-B/D
ARC RHX-100 32-bit MCU, RV32I + optional Vector
ARC RMX-500 32-bit MCU, RV321 +optional DSP; ASIL-D

Entry Microcontroller

ARC RMX-100 32-bit MCU, RV32E / RV32I; ASIL-D

Digital Signal Processing

ARC VPX Family Scalable VLIW/SIMD with vector FPU
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