FPGA implementation of the ADMM solver in AccelMPC: High-Rate, Low-Power FPGA-Accelerated Model Predictive Control for Tiny Drones, by Andrea Grillo and Brian Plancher. The design targets an Artix-7 100T and runs on the custom Crazyflie FPGA deck or an Arty A7 development board.
Evaluation results · Build and program · Design and interfaces · Solver walkthrough · Run benchmarks · Measure power
To regenerate the benchmark and flight figures from bundled data, no FPGA is needed:
python3 -m venv .venv
source .venv/bin/activate
python -m pip install numpy==1.26.4 matplotlib==3.10.1
python evaluation/plot_benchmarks.py
python evaluation/flight_metrics.pyFor hardware builds, follow the toolchain setup. Python generates the model matrices and reference trajectory; Vitis HLS compiles the C++ solver; Vivado integrates its RTL with SPI/UART and produces the bitstream.
| Location | Contents |
|---|---|
| vitis_projects/ADMM/ | Solver C++, numerical types, HLS configurations and testbenches |
| vivado_project/ | FPGA top levels, SPI/UART, power instrumentation and board constraints |
| scripts/ | Model generation, build support and benchmark runners; see the workflow guide |
| evaluation/ | Recorded inputs, analysis, results and figure generation |
| tests/ | Host, RTL and HLS power-workflow checks |
| video/ | Supplementary demo, recordings and editing assets |
Generated builds live in build/; local experiment outputs live in results/;
full figure exports live in evaluation/output/. These directories are ignored.
The FPGA/firmware packet interface is described in the design guide. This repository is released under the MIT license.
@article{grillo2026accelmpc, title={AccelMPC: High-Rate, Low-Power FPGA-Accelerated Model Predictive Control for Tiny Drones}, author={Grillo, Andrea and Plancher, Brian}, journal={arXiv preprint arXiv:2609.09380}, year={2026} }