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XiangShan XiangShan Public

Open-source high-performance RISC-V processor

Scala 7.4k 984
XiangShan-doc XiangShan-doc Public

Documentation for XiangShan

Markdown 447 155
HuanCun HuanCun Public

Open-source high-performance non-blocking cache

Scala 102 40
difftest difftest Public

Modern co-simulation framework for RISC-V CPUs

C++ 192 113
xs-env xs-env Public

XiangShan Frontend Develop Environment

Shell 76 78
NEMU NEMU Public

Super fast RISC-V ISA emulator for XiangShan processor

C 356 147

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Showing 10 of 114 repositories

difftest Public
Modern co-simulation framework for RISC-V CPUs

OpenXiangShan/difftest's past year of commit activity

C++ 192 MulanPSL-2.0 113 8 24 Updated Nov 12, 2026
XiangShan Public
Open-source high-performance RISC-V processor

OpenXiangShan/XiangShan's past year of commit activity

Scala 7,391 MulanPSL-2.0 984 162 235 Updated Nov 12, 2026
XSAI Public Forked from OpenXiangShan/XiangShan
A fork of Xiangshan for AI

OpenXiangShan/XSAI's past year of commit activity

Scala 65 MulanPSL-2.0 1,010 1 1 Updated Nov 12, 2026
GEM5 Public

OpenXiangShan/GEM5's past year of commit activity

C++ 170 BSD-3-Clause 101 18 120 Updated Nov 12, 2026
OpenNCB Public
Open-source Non-coherent CHI Bridge (CHI SN-F to AXI-4 bridge)

OpenXiangShan/OpenNCB's past year of commit activity

Scala 8 3 0 0 Updated Nov 12, 2026
chisel Public Forked from chipsalliance/chisel
Chisel: A Modern Hardware Design Language

OpenXiangShan/chisel's past year of commit activity

Scala 0 Apache-2.0 676 0 0 Updated Nov 12, 2026
AME_qemu Public Forked from qemu/qemu
Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are disabled. Please only use release tarballs from the QEMU website.

OpenXiangShan/AME_qemu's past year of commit activity

C 0 7,614 0 0 Updated Nov 12, 2026
XiangShanLab Public
XiangShanLab is the open-source XiangShan ecosystem's entry layer — a learning, practice, and collaboration hub spanning the RISC-V processor core and its specialized domains, making high-performance processor design learnable, doable, and participable, and welcoming collaborators from academia and industry to join real open-source development.

OpenXiangShan/XiangShanLab's past year of commit activity

Scala 62 58 56 33 Updated Nov 12, 2026
NEMU Public
Super fast RISC-V ISA emulator for XiangShan processor

OpenXiangShan/NEMU's past year of commit activity

C 356 147 43 42 Updated Nov 12, 2026
XiangShan-Design-Doc Public
Documentation for XiangShan Design

OpenXiangShan/XiangShan-Design-Doc's past year of commit activity

Markdown 55 CC-BY-4.0 17 3 10 Updated Nov 12, 2026

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