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README.md

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Welcome to the SystemRDL open source community!

The goal of this GitHub organization is to build high-quality free and open-source tools for control & status register (CSR) automation, and to promote Accellera's SystemRDL as the language of choice for CSR design entry. 1

If you are new to SystemRDL, check out this quick language tutorial.

PeakRDL Command Line Application

PeakRDL is a command-line application that provides a ready-to-use register automation toolchain.

See the PeakRDL Documentation for more details.

Individual PeakRDL Components

If the command line tool isn't your style, you can use the PeakRDL components individually. Each component is installable as a separate Python package and has a documented API you can use to integrate it into your own custom workflow.

  • PeakRDL-regblock generates synthesizable SystemVerilog RTL.
  • PeakRDL-regblock-vhdl generates synthesizable VHDL RTL.
  • PeakRDL-html produces intuitive and dynamic HTML documentation.
  • PeakRDL-uvm generates a UVM register model.
  • PeakRDL-ipxact lets you import and export IP-XACT XML.
  • PeakRDL-cheader outputs a software abstraction layer C header.

Be sure to also check out the growing list of tools others in the community have made.

SystemRDL language front-end compiler

Need to build something custom? Don't invent your own janky input format - Use SystemRDL! The SystemRDL compiler front-end handles all the heavy-lifting of processing the SystemRDL language so you don't have to. The compiler provides a rich and intuitive Python API that you can use for your own custom register automation.

See the SystemRDL Compiler Documentation for more details.

Our register specs are described in a proprietary format. How can I start using them with PeakRDL?

If you are just starting to migrate to SystemRDL and still need to support other internal register description formats, it is pretty easy to create an importer to help transition your workflow from non-SystemRDL description formats.

To learn how this works, check out the tutorial on PeakRDL importer plugins.

Once you build an importer, you can use the PeakRDL-systemrdl tool to convert to SystemRDL.

Get free help!

If you have questions about SystemRDL, check out the GitHub discussions area. Or for more casual discussions, find us on the #PeakRDL:fossi-chat.org Matrix chat room hosted by the FOSSi Foundation

Footnotes

  1. This SystemRDL GitHub group is not affiliated with Accellera. ↩

Popular repositories Loading

  1. systemrdl-compiler systemrdl-compiler Public

    SystemRDL 2.0 language compiler front-end

    C++ 289 82

  2. PeakRDL PeakRDL Public

    Control and status register code generator toolchain

    Python 229 48

  3. PeakRDL-regblock PeakRDL-regblock Public

    Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.

    Python 91 71

  4. PeakRDL-html PeakRDL-html Public

    Generate address space documentation HTML from compiled SystemRDL input

    JavaScript 68 26

  5. PeakRDL-uvm PeakRDL-uvm Public

    Generate UVM register model from compiled SystemRDL input

    Python 62 37

  6. PeakRDL-ipxact PeakRDL-ipxact Public

    Import and export IP-XACT XML register models

    Python 41 19

Repositories

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Showing 10 of 18 repositories
  • PeakRDL-Markdown Public

    Markdown exporter for the PeakRDL toolchain

    SystemRDL/PeakRDL-Markdown's past year of commit activity
    Python 13 GPL-3.0 16 4 3 Updated Nov 9, 2026
  • PeakRDL Public

    Control and status register code generator toolchain

    SystemRDL/PeakRDL's past year of commit activity
    Python 229 LGPL-3.0 48 9 0 Updated Oct 26, 2026
  • systemrdl-compiler Public

    SystemRDL 2.0 language compiler front-end

    SystemRDL/systemrdl-compiler's past year of commit activity
    C++ 289 MIT 82 15 2 Updated Oct 7, 2026
  • PeakRDL-PyRAL Public

    Lightweight and highly scalable Python register abstraction layer

    SystemRDL/PeakRDL-PyRAL's past year of commit activity
    Python 6 LGPL-3.0 2 1 1 Updated Oct 1, 2026
  • PeakRDL-html Public

    Generate address space documentation HTML from compiled SystemRDL input

    SystemRDL/PeakRDL-html's past year of commit activity
    JavaScript 68 LGPL-3.0 26 11 2 Updated Sep 22, 2026
  • PeakRDL-regblock-vhdl Public Forked from SystemRDL/PeakRDL-regblock

    Generate VHDL RTL that implements a register block from compiled SystemRDL input.

    SystemRDL/PeakRDL-regblock-vhdl's past year of commit activity
    Python 14 LGPL-3.0 71 4 0 Updated May 18, 2026
  • sphinx-peakrdl Public
    SystemRDL/sphinx-peakrdl's past year of commit activity
    Python 1 LGPL-3.0 3 4 4 Updated Apr 22, 2026
  • PeakRDL-regblock Public

    Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.

    SystemRDL/PeakRDL-regblock's past year of commit activity
    Python 91 LGPL-3.0 71 25 8 Updated Mar 28, 2026
  • PeakRDL-cheader Public
    SystemRDL/PeakRDL-cheader's past year of commit activity
    Python 18 LGPL-3.0 29 9 9 Updated Mar 28, 2026
  • .github Public
    SystemRDL/.github's past year of commit activity
    0 4 0 0 Updated Mar 24, 2026
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