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GeezerVison is showing github.com — Open Source VHDL Group

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  1. PoC PoC Public

    Forked from VLSI-EDA/PoC

    IP Core Library - Published and maintained by the Open Source VHDL Group

    VHDL 99 10

  2. CoreLib CoreLib Public

    A VHDL Core Library.

    18 2

  3. Interfaces Interfaces Public

    Interface definitions for VHDL-2019.

    VHDL 36 5

  4. pyVHDLModel pyVHDLModel Public

    An abstract language model of VHDL written in Python.

    Python 66 18

  5. VHDLDomain VHDLDomain Public

    A Sphinx domain providing VHDL language support.

    Python 21 5

  6. Compliance-Tests Compliance-Tests Public

    Tests to evaluate the support of VHDL 2008 and VHDL 2019 features

    VHDL 32 10

Repositories

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Showing 10 of 21 repositories
  • VHDLDomain Public

    A Sphinx domain providing VHDL language support.

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    VHDL/VHDLDomain's past year of commit activity
    Python 21 5 2 1 Updated Nov 12, 2026
  • pyVHDLModel Public

    An abstract language model of VHDL written in Python.

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    VHDL/pyVHDLModel's past year of commit activity
    Python 66 18 8 0 Updated Nov 10, 2026
  • PoC Public Forked from VLSI-EDA/PoC

    IP Core Library - Published and maintained by the Open Source VHDL Group

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    VHDL/PoC's past year of commit activity
    VHDL 99 120 10 4 Updated Nov 6, 2026
  • OSVVM-Scripts Public Forked from OSVVM/OSVVM-Scripts

    OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation

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    VHDL/OSVVM-Scripts's past year of commit activity
    Tcl 0 26 0 0 Updated Nov 3, 2026
  • news Public

    VHDL related news.

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    VHDL/news's past year of commit activity
    Python 27 0 31 0 Updated Nov 3, 2026
  • OSVVM Public Forked from OSVVM/OSVVM

    OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...

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    VHDL/OSVVM's past year of commit activity
    VHDL 0 75 0 0 Updated Oct 25, 2026
  • Synchronize Public

    Auto Synchronize forked repositories.

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    VHDL/Synchronize's past year of commit activity
    0 0 0 0 Updated Oct 22, 2026
  • OSVVM-AXI4 Public Forked from OSVVM/AXI4

    AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

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    VHDL/OSVVM-AXI4's past year of commit activity
    VHDL 1 28 0 0 Updated Oct 22, 2026
  • OSVVM-Common Public Forked from OSVVM/OSVVM-Common

    Packages that implement OSVVM's model independent transactions and other shared verification component support packages. Required for all OSVVM verification components. AddressBusTransactionPkg - AXI, AxiLite, ... StreamTransactionPkg - AxiStream, UART, ...

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    VHDL/OSVVM-Common's past year of commit activity
    VHDL 0 11 0 0 Updated Oct 22, 2026
  • OSVVM-UART Public Forked from OSVVM/UART

    OSVVM UART Verification Components. Uart Transmitter with error injection for parity, stop, and break errors. UART Receiver verification component with error handling for parity, stop, and break errors.

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    VHDL/OSVVM-UART's past year of commit activity
    VHDL 0 12 0 0 Updated Sep 13, 2026
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Most used topics

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