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GeezerVison is showing github.com — EM Microelectronic-US Inc.

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  1. toolchain toolchain Public

    Forked from foss-for-mips-arc-processors/toolchain

    Repository containing releases of prebuilt GNU toolchains for DesignWare ARC Processors from Synopsys (available from 'releases' link below). The repository itself contains all the scripts required…

    Shell

  2. gcc gcc Public

    Forked from foss-for-mips-arc-processors/gcc

    The development tree for GCC for the Synopsys DesignWare ARC processor family

    C

  3. binutils-gdb binutils-gdb Public

    Forked from foss-for-mips-arc-processors/binutils-gdb

    A mirror of the upstream binutils-gdb repository for ARC specific work

    C

  4. riscv-isa-sim riscv-isa-sim Public

    Forked from riscv-software-src/riscv-isa-sim

    Spike, a RISC-V ISA Simulator

    C

  5. riscv-dbg riscv-dbg Public

    Forked from pulp-platform/riscv-dbg

    RISC-V Debug Support for our PULP Cores

    SystemVerilog

  6. pulp-riscv-binutils-gdb pulp-riscv-binutils-gdb Public

    Forked from pulp-platform/pulp-riscv-binutils-gdb

    C

Repositories

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  • elf2mif Public

    Utility to convert an ELF file into a Memory Initialization File (MIF)

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    emmicro-us/elf2mif's past year of commit activity
    C++ 0 BSD-2-Clause 0 0 0 Updated Aug 30, 2023
  • cv32e40p Public Forked from openhwfoundation/cv32e40p

    CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

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    emmicro-us/cv32e40p's past year of commit activity
    SystemVerilog 0 564 0 0 Updated Feb 18, 2021
  • core-v-docs Public Forked from openhwfoundation/programs

    Documentation for the OpenHW Group's set of CORE-V RISC-V cores

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    emmicro-us/core-v-docs's past year of commit activity
    Python 0 100 0 0 Updated Oct 5, 2020
  • riscv-dbg Public Forked from pulp-platform/riscv-dbg

    RISC-V Debug Support for our PULP Cores

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    emmicro-us/riscv-dbg's past year of commit activity
    SystemVerilog 0 104 0 0 Updated Jul 23, 2020
  • cpp-optparse Public Forked from weisslj/cpp-optparse

    Python's excellent OptionParser in C++

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    emmicro-us/cpp-optparse's past year of commit activity
    C++ 0 MIT 54 0 0 Updated Apr 9, 2020
  • ELFIO Public Forked from serge1/ELFIO

    ELFIO - ELF (Executable and Linkable Format) reader and producer implemented as a header only C++ library

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    emmicro-us/ELFIO's past year of commit activity
    C++ 0 MIT 199 0 0 Updated Apr 9, 2020
  • pulp-riscv-binutils-gdb Public Forked from pulp-platform/pulp-riscv-binutils-gdb

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    emmicro-us/pulp-riscv-binutils-gdb's past year of commit activity
    C 0 GPL-2.0 22 0 0 Updated Aug 1, 2019
  • riscv-isa-sim Public Forked from riscv-software-src/riscv-isa-sim

    Spike, a RISC-V ISA Simulator

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    emmicro-us/riscv-isa-sim's past year of commit activity
    C 0 1,156 0 0 Updated Sep 26, 2018
  • binutils-gdb Public Forked from foss-for-mips-arc-processors/binutils-gdb

    A mirror of the upstream binutils-gdb repository for ARC specific work

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    emmicro-us/binutils-gdb's past year of commit activity
    C 0 GPL-2.0 14 0 0 Updated Jul 21, 2016
  • gcc Public Forked from foss-for-mips-arc-processors/gcc

    The development tree for GCC for the Synopsys DesignWare ARC processor family

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    emmicro-us/gcc's past year of commit activity
    C 0 GPL-2.0 18 0 0 Updated Jul 21, 2016
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