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Send video/audio over HDMI on an FPGA
SystemVerilog
1.3k
150
Generic FPGA SDRAM controller, originally made for AS4C4M16SA
Verilog
87
12
Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
SystemVerilog
35
3
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Showing 10 of 15 repositories
hdmi
Public
Send video/audio over HDMI on an FPGA
hdl-util/hdmi's past year of commit activity
hdmi-demo
Public
Demo of hdmi on at 720p with VGA-compatible text mode and sound
hdl-util/hdmi-demo's past year of commit activity
Verilog
29
10
4
0
Updated Jan 27, 2023
hdl-util/mipi-demo's past year of commit activity
Verilog
84
23
3
0
Updated May 27, 2021
hdl-util/unipolar-rz's past year of commit activity
SystemVerilog
1
0
0
0
Updated Mar 7, 2021
sdram-controller
Public
Generic FPGA SDRAM controller, originally made for AS4C4M16SA
hdl-util/sdram-controller's past year of commit activity
Verilog
87
12
0
0
Updated Sep 7, 2020
image-processing
Public
SystemVerilog code for image processing tasks like demosaicing
hdl-util/image-processing's past year of commit activity
SystemVerilog
11
3
0
0
Updated Jun 28, 2020
rand
Public
Random number generators such as LFSRs, LHCAs
hdl-util/rand's past year of commit activity
SystemVerilog
4
2
0
0
Updated Jun 27, 2020
hdl-util/clock-domain-crossing's past year of commit activity
SystemVerilog
8
3
0
0
Updated Jun 27, 2020
gray-code
Public
Generate a gray code of arbitrary width in SystemVerilog
hdl-util/gray-code's past year of commit activity
mipi-csi-2
Public
Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA
hdl-util/mipi-csi-2's past year of commit activity
SystemVerilog
80
20
0
0
Updated Jun 22, 2020
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