Tobias Scheipel tscheipel

bikes and science. that's about it.

Achievements

tscheipel/README.md

🚀 I'm an Assistant Professor of Reconfigurable Computer Architectures at the Embedded Architectures & Systems Group, Graz University of Technology.
🌟 Specializing in flexible and runtime-reconfigurable FPGA-based microcontroller architectures for embedded systems based on RISC-V.
🔧 Building innovative solutions in research and teaching for dynamic and reconfigurable embedded systems.
📚 Advocating for Open Educational Resources (OER) to make knowledge accessible and foster collaborative learning.
💙💛 RISC-V Advocate

HaDes-V HaDes-V Public template

HaDes-V is an Open Educational Resource for learning microcontroller design. It guides you through creating a pipelined 32-bit RISC-V processor using SystemVerilog and FPGA tools. Developed by TU G…

SystemVerilog 196 106

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