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Chipyard is a framework and generator for constructing custom RISC‑V SoC hardware. Built at UC Berkeley, it leverages Chisel/FIRRTL to generate full-stack systems—from CPU cores to peripherals—and includes simulators, FPGA deployment tools, and integration with Rocket Chip and other RISC‑V ecosystems.

Features

• Compose RISC‑V processors, caches, and accelerators via Chisel
• Simulate systems using Verilator, VCS, or FPGA toolchains
• Includes pre-built example systems and test harnesses
• Supports generator plugins and parameterized configurations
• Integration with RISC‑V Rocket Chip and TileLink protocols
• Enables full SoC synthesis, simulation, and performance evaluation

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