GV

GeezerVison

The World Wide Web, restored to 800 pixels of glory.

Home|About|Gaming cabinet|Archives|How it works|Starter sites

On this site

  • RISC-V Blog
  • News and Updates
  • Viewpoints
  • Featured Work
  • Submit Content
  • About
  • Annual Report 2025
  • About RISC-V International
  • Staff
  • Board of Directors
  • Technical Steering Committee
  • Contact Us
  • Ratified
  • Specs Under Development

This view

  • Original page
  • New address

GeezerVison is showing riscv.org — FAQ

Register today for RISC-V Summit North America 2027 | San Francisco, California | February 16-18, 2027

Close Search

FAQ

Get answers to common questions about the RISC-V architecture, membership benefits, and community initiatives, helping to guide new and existing members alike.

JOIN RISC-V INTERNATIONALGET IN TOUCH

General

What is RISC-V International?

RISC-V International is a nonprofit organization that is the caretaker of the RISC-V instruction set. RISC-V International does not support open source hardware projects. Other organizations support them.

Does RISC-V International include open source hardware projects based on RISC-V?

No. RISC-V International does not support open source hardware projects. Other organizations support them.

Why is RISC-V International incorporated in Switzerland?

In March 2020, the RISC-V International Association moved its incorporation to Switzerland. The move, approved by the RISC-V International Board of Directors, was a decision made to ensure continued ecosystem growth of the open standard for years to come. RISC-V International is not incorporated in Switzerland based on any one country, company, government, or event. The IP contributed and produced by RISC-V International is held under industry and global standard licenses that are already open to leverage by any company regardless of jurisdiction.

What is RISC-V International’s position on why an open standard?

The entire tech ecosystem benefits from standards being open, whether it’s RISC-V or other popular standards such Ethernet, HTTPS, JPEG, or USB. 

Three key reasons RISC-V is strategically important:

  1. Open Standards have been critical to technology innovation, adoption, and growth for decades
  2. Open Standards create access to opportunities and spur growth for a wide range of stakeholders (jobs, consumers, research, academia, industry, etc)
  3. RISC-V is the defined open standard Instruction Set Architecture for Computing

How does an open standard impact global innovation?

Throughout history, interoperable standards provide incentives for more customers to buy new types of products, creating additional opportunities for more vendors to provide them, competing on value-added features and services. Compatibility based on such standards is essential for innovation on a global basis within the larger tech ecosystem. Competition is not based on shared standards, but rather on the unique value that each vendor adds on top of the standardized layer.

Engaging in the cultivation of global standards has long been a hallmark of technical leaders in the US as well as around the world, who have not only participated across the spectrum of traditional standards organizations but led the way in forming more than a thousand consortia, alliances, and fora that have brought some of the most important information and communications technology standards to the marketplace.

Technology

What is an instruction set?

When software talks to hardware, it uses a vocabulary called an instruction set. Examples of words or instructions in the vocabulary are also on the keys of a calculator: add, subtract, multiply, and so on. Programs consist of millions of these simple instructions executed billions of times.

RISC stands for Reduced Instruction Set Computer. What is a “reduced” instruction set?

Riding Moore’s Law, by the 1980s microprocessors grew so much in performance that they could challenge large computers. The question was what was the best vocabulary or instruction set for these rapidly improving microprocessors? Should it change from the instruction sets of the large computers that powered the industry of the 1970s? 

To understand this vital question about the interface between software and hardware, we need more context. It was so tedious to program in the low-level machine language that computer pioneers soon invented high-level programming languages that were easier to use plus programs that translated from high-level languages to machine language, called compilers. Regarding instruction sets for microprocessors, the programmers’ burden of writing in low-level machine language was no longer an issue. Instead, the question was can compilers produce efficient programs for a given vocabulary?

We called the large computers with vocabularies that followed conventional wisdom “complex instruction set computers” abbreviated CISC and pronounced “sisk”. If microprocessors instead used vocabularies with simple instructions, they were called “reduced instruction set computers” abbreviated RISC and pronounced “risk.” Think of CISC as having many polysyllabic words while RISC has monosyllabic words. RISC advocates thought it would be easier to build microprocessors that understood RISC vocabularies than CISC vocabularies and easier for compilers to generate RISC programs than CISC programs.

Is RISC or CISC better?

To answer whether RISC or CISC is better, we needed to discover the ratios of the average number of instructions a program needs to read—the complex CISC instructions should be fewer than RISC—versus the average time to read one instruction—the simple RISC instructions should be read faster than CISC instructions. It was  discovered that RISC reads a few more instructions (approximately 30% more) but reads them so much faster (around 5 times faster) that the net result is that RISC is 3 to 4 times faster than CISC. Of the processors shipped each year, 99% are now RISCs.

Why is it called RISC-V?

UC Berkeley did four generations of RISC projects in the 1980s. The effort in 2010 to build a new RISC instruction set based on everything learned in the intervening 30 years was called RISC-V (“risk five”) to honor the prior Berkeley projects (RISC-I, RISC-II, …).

Is there an ISA reference manual?

Yes. See Ratified Specifications.

Are there publications beyond the ISA reference manual?

Yes. View the Ratified Specifications.

What software tools are available?

There are a wide variety of software tools available; proceed to the RISC-V Landscape to see a list.

Ecosystem

What is the license model?

The RISC-V ISA is free and open with a permissive license for use by anyone in all types of implementations. Designers are free to develop proprietary or open source implementations for commercial or other exploitations as they see fit. RISC-V International encourages all implementations that are compliant to the specifications.

Note that the use of the RISC-V trademark requires a license which is granted to members of RISC-V International for use with compliant implementations. The RISC-V specification is based around a structure which allows flexibility with modular extensions and additional custom instructions/extensions. If an implementation was based on the RISC-V specification but includes modifications beyond this framework, then it cannot be referenced as RISC-V.

Does that mean free for industry to use and play with, but then we pay if we produce a product using this ISA?

There is no fee to use the RISC-V ISA. Those who want to use the RISC-V logo should join RISC-V International. To create an implementation from the RISC-V ISA, it is necessary to procure or leverage additional IP outside of RISC-V which may carry a fee. The RISC-V ISA alone is not an implementation.

Who uses an ISA?

Designers of computer chips use ISAs, but it is also used by developers of system software for those chips (for operating systems, compilers, debuggers, and so on.) In fact, anyone with a new idea application needs to pick the ISAs on which their software will run, so they are also users of ISAs. Finally, ISAs play an important role in education, as students who want to understand the organization of computers need to learn it at the ISA level. In fact, part of the original motivation for RISC-V was to have an ISA that would be easy to learn and use in the classroom.

If our company builds a RISC-V implementation, is it required to release its source code for the RISC-V core?

No, the source code can be completely closed.

Is RISC-V the hardware equivalent of the open source operating system Linux?

No. This question is an apples-and-oranges comparison. Linux is a computer artifact, software that you can run on your laptop computer.  In contrast, RISC-V is a specification of a vocabulary for a computer. The closest analogy to the RISC-V specification is a book that defines words, like a dictionary.  A dictionary can’t run programs.

What is the difference between “open source” and “open standard”?

“Open source” is traditionally associated with software for which the original source code is made freely available and may be redistributed and modified. An open standard is a standard that is openly accessible and usable by anyone, such as ISO 668:2020, WiFi, Bluetooth or TCP/IP. It is also a common prerequisite that open standards use an open license that provides for extensibility. Read more.

Why do people commonly confuse the open RISC-V specification with open source hardware projects?

Part of the confusion is that the RISC-V specification enables civic-minded organizations to make hardware designs that are open sourced like Linux software, in that anyone can download them to get a headstart in building hardware. An instruction set standard like RISC-V is essentially necessary to enable open source hardware projects—as you don’t want to build the software stack all by yourself—but using RISC-V does not require that processors that adopt its instruction set must be open sourced.

RISC-V is referred to as an open standard or specification. What is an example of an open specification?

In the 1950s, Malcolm Maclean invented the idea of a reusable shipping container that could be transported by trucks, trains, and ships. Having a standard specification—8’x8.5’x40’ of corrugated steel—allowed shipping containers to be transported and manufactured anywhere in the world. The official name of the shipping container standard is International Organization for Standardization (ISO) standard 668:2020. Instead of shipping boxes on top of wooden pallets, containers offered so many benefits that they are credited with eventually increasing the world’s economy. Without a global standard specification, each country could have their own container design, which would be tremendously inefficient.

Who supports the RISC-V ISA?

The RISC-V instruction set architecture (ISA) and related specifications are developed, ratified and maintained by RISC-V International contributing members within the RISC-V International Technical Working Groups. Work on the specification is performed on GitHub, and the GitHub issue mechanism can be used to provide input into the specification.

Subscribe for updates, event info, webinars, and the latest community news

About
Technical Steering Committee
Board of Directors
FAQ
Contact Us
About RISC-V
History of RISC-V
Blog
News
Announcements
Genealogy
Policies
Privacy Policy
Code of Conduct
Antitrust Policy
Brand Guidelines
Specification
Ratified
Under Development
Contribute
Developers
Get Started
Training
Development Partners
Developer Boards
Labs
Mentorship
Technical Wiki
Industries
Automotive
Data Center
High Performance Computing
IoT & Embedded
Industrial & Robotics
Space & Aerospace
Technologies
Artificial Intelligence
Security
Solutions
Case Studies
Landscape
Software Ecosystem Dashboard
Events
RISC-V Summit
Calendar
Videos
Community Meetings
Members
Current Members
Resources
Recognition
Resources
Get RISC-V Gear
Join RISC-V International
Becoming a member of RISC-V International allows companies and individuals to actively influence the development of an open, royalty-free instruction set architecture, driving innovation in custom processor designs.
JOIN NOW
You are visitor 01402503 — GeezerVison does not store the pages you look up.
Best viewed with Netscape Navigator 4.7 or Internet Explorer 6 at 800×600. No cookies required.