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An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

boom rocket rocket-chip chip-generator chisel riscv rtl peripherals soc out-of-order superscalar risc-v firesim accelerators chipyard hwacha

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

cloud fpga hardware simulation boom rocket-chip risc-v datacenter on-prem firesim

Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.

linux fedora spike distro qemu buildroot workload firesim chipyard

BRU: Bandwidth Regulation Unit for Real-Time Multicore Processors

firesim bru bandwidth-regulation-unit

Chisel 6 and FIRRTL 2 wrapper for MoSAIC to integrate into FireSim

chisel firrtl mosaic firesim

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