Parsing gigabytes of JSON per second : used by Facebook/Meta Velox, the Node.js runtime, ClickHouse, WatermelonDB, Apache Doris, Milvus, StarRocks
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risc-v
Unlike most other ISA designs, the RISC-V ISA is provided under open source licenses that do not require fees to use. A number of companies are offering or have announced RISC-V hardware, open source operating systems with RISC-V support are available and the instruction set is supported in several popular software toolchains. Notable features of the RISC-V ISA include a load–store architecture, bit patterns to simplify the multiplexers in a CPU, IEEE 754 floating-point, a design that is architecturally neutral, and placing most-significant bits at a fixed location to speed sign extension. The instruction set is designed for a wide range of uses. The base instruction set has a fixed length of 32-bit naturally aligned instructions, and the ISA supports variable length extensions where each instruction could be an any number of 16-bit parcels in length. Subsets support small embedded systems, personal computers, supercomputers with vector processors, and warehouse-scale 19 inch rack-mounted parallel computers. Here are 3,589 public repositories matching this topic...Language: All
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Parsing gigabytes of JSON per second : used by Facebook/Meta Velox, the Node.js runtime, ClickHouse, WatermelonDB, Apache Doris, Milvus, StarRocks
c-plus-plus json neon x64 clang cpp11 simd json-parser avx2 json-pointer arm64 aarch64 avx512 gcc-compiler sse42 risc-v vs2019 clang-cl loongarch64 loongarch
Speech-to-text, text-to-speech, speaker diarization, speech enhancement, source separation, and VAD using next-gen Kaldi with onnxruntime without Internet connection. Support embedded systems, Android, iOS, HarmonyOS, Raspberry Pi, RISC-V, RK NPU, Axera NPU, Ascend NPU, x86_64 servers, websocket server/client, support 12 programming languages
android windows macos linux lazarus raspberry-pi ios text-to-speech csharp cpp dotnet speech-to-text aarch64 mfc risc-v object-pascal asr arm32 onnx vits
A FREE comprehensive reverse engineering tutorial covering x86, x64, 32-bit/64-bit ARM, 8-bit AVR and 32-bit RISC-V architectures.
c go rust golang c-plus-plus avr arm assembly x64 reverse-engineering malware wasm hacking cybersecurity assembly-language x86 assembly-language-programming cyber-security risc-v reverse-engineering-tutorial
RT-Thread is an open source IoT Real-Time Operating System (RTOS). https://rt-thread.github.io/rt-thread/
iot arm real-time microcontroller kernel cortex-m mips embedded-systems microkernel rtos risc-v cortex-a aiot
Your Gateway to Embedded Software Development Excellence 👽
debugging iot arduino esp8266 avr package-manager unit-testing arm microcontroller embedded libraries firmware esp32 ide platformio build-system cmsis rtos risc-v zephyr-rtos
Open-source high-performance RISC-V processor
A secure embedded operating system for microcontrollers
rust iot arm microcontroller embedded kernel cortex-m operating-system mcu tock risc-v secure-operating-system
Lightweight justice for your single-board computer!
shell bash lightweight debian optimization raspberrypi odroid pine64 orangepi sbc risc-v dietpi nanopi radxa
面向IoT领域的、高可伸缩的物联网操作系统,可去官网了解更多信息https://www.aliyun.com/product/aliosthings
Open-source library of optimized deep learning operations (matmul, convolution, attention) for CPUs (x64, AArch64, RISC-V) and Intel GPUs. Used by PyTorch, TensorFlow, OpenVINO, and ONNX Runtime.
arm performance deep-learning cpp x64 x86-64 inference ace convolution amx aarch64 risc-v sycl matmul intel-gpu oneapi onednn llm avx10 mxfp8
Modern, secure, portable, multiprotocol bootloader and boot manager.
arm x64 x86-64 riscv x86 uefi bootloader arm64 mbr gpt aarch64 boot-loader efi bios risc-v boot-manager loongson riscv64 loongarch64 loongarch
A fully compliant RISC-V computer made inside the game Terraria
A graphical processor simulator and assembly editor for the RISC-V ISA
Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems
The official repository for the gem5 computer-system architecture simulator.
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
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