A graphical processor simulator and assembly editor for the RISC-V ISA

education processor-architecture qt simulator computer-architecture risc risc-v cpu-emulator

• Updated Nov 11, 2026
• C++

The RISC-V Virtual Machine

c linux emulator vm translation virtual-machine emulation jit riscv risc emulators risc-v riscv32 riscv-linux riscv64 tracing-jit riscv-simulator riscv-emulator instruction-decoding rvvm

• Updated Oct 31, 2026
• C

VeeR EH1 core

fpga processor riscv rtl risc risc-v open-source-hardware fusesoc verilator riscv32 western-digital axi4 ahb-lite asic-design veer

• Updated Jul 16, 2026
• SystemVerilog

RISC-V simulator for x86-64

linux emulator metadata simulator disassembler histogram riscv isa risc binary-translation macro-op-fusion rv-sys rv-sim rv-meta rv-jit rv8

• Updated Feb 5, 2022
• C++

Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink

cpu fpga gameboy pcb risc risc-v

• Updated Dec 14, 2025
• C

RISC-V Assembler and Runtime Simulator

education simulator runtime asm assembler riscv risc risc-v rv32 riscv-simulator runtime-simulator rv32g

• Updated Oct 31, 2026
• JavaScript

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs

simulator cpu pipeline mips simulation mipt cpu-cache optimizations computer-architecture risc cpu-model risc-v branch-prediction computer-architecture-lesson branch-predictor clock-precise pre-silicon mips-binutils prediction-algorithms

• Updated Jun 11, 2022
• C++

RISC-V instruction set simulator built for education

education assembler risc risc-v

• Updated Apr 2, 2022
• Kotlin

WebRISC-V: A Web-Based Education-Oriented RISC-V Pipeline Simulation Environment [PHP]

php education processor-architecture simulator pipeline assembly computer-architecture risc risc-v pipeline-simulation-environment

• Updated May 25, 2026
• PHP

Architecture and Verilog Implementation of 8-bits RISC CPU based on FSM. 基于有限状态机的8位RISC（精简指令集）CPU（中央处理器）简单结构和Verilog实现。

cpu fsm verilog risc

• Updated Jan 20, 2019
• Verilog

RISC-V Instruction Set Simulator (Built for education).

education simulator assembly computer-architecture risc risc-v

• Updated Jan 24, 2022
• Dart

MRSIC32 ISA documentation and development

cpu isa risc mrisc32

• Updated Sep 2, 2023
• TeX

OpenID Shared Signals Working Group Repository

risc ssf caep sharedsignals

• Updated Sep 29, 2026
• Makefile

MikroLeo project files (schematic, PCB, assembler, emulator/debugger, circuit simulation file, documentation, example of programs etc). MikroLeo is a 4-bit microcomputer developed mainly for educational purposes and distributed for free under open-source licenses.

open-source education didactic programming cpu asm assembler foss computer assembly-language logic-gates alu risc oshw digital-electronics nibble 4-bit microcomputer harvard-architecture 74hctxxx

• Updated Jul 31, 2026
• Python

Project Oberon RISC emulator in Go

go emulator golang oberon risc oberon-system oberon-07 wirth wirth-oberon project-oberon

• Updated Dec 21, 2025
• Go

A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set

cpu fpga assembly vhdl assembler risc wishbone soft-core risc-processor wishbone-bus risc-cpu

• Updated Sep 13, 2026
• Assembly

AluVM: RISC functional machine base implementation

rust microcontrollers functional-programming virtual-machine smart-contracts blockchain embedded-systems risc instruction-set-architecture edge-computing

• Updated Jul 27, 2025
• Rust

A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.

cryptography microcontroller cpu crypto verilog mit-license systemverilog risc formal-verification yosys risc-v verilator micro-controller riscv64

• Updated Jan 31, 2022
• SystemVerilog

C language compiler from scratch for a custom architecture, with virtual machine and all

c emulator parser csharp parsing compiler uwp virtual-machine net risc c-language superpower

• Updated Jun 4, 2022
• C#

32-bit 5-stage pipelined RISC-V processor in SystemVerilog

pipeline processor riscv systemverilog risc risc-v

• Updated Oct 29, 2023
• SystemVerilog