".... Synopsys’ software‑defined hardware‑assisted verification and the new HAPS‑200 12 FPGA systems are accelerating our system‑level verification and validation, helping us deliver complex AI platforms on aggressive schedules. And Synopsys modular hardware-assisted verification enables deeper collaboration across our ecosystem."

Narendra Konda

Vice President, Hardware Engineering, NVIDIA

“... HW-assisted verification is no longer optional. It is critical to meeting aggressive time-to-market goals and ensuring silicon readiness. FPGA-based emulation and prototyping play a central role in that effort by accelerating system bring-up and enabling earlier software development... Through joint optimization of Synopsys ZeBu with the AMD Vivado software stack, and by leveraging AMD EPYC processors for compute acceleration, we are reducing compile times and helping customers move to accurate system models faster.”

Salil Raje

Sr Vice President and General Manager, Adaptive and Embedded Computing Group, AMD

*Based on AMD internal analysis in May 2023 with a 6-input LUT count to compare the Versal Premium VP1902 device versus competitor offerings.

“Synopsys is a key member of Arm Total Design, bringing critical tools and the advanced HAV capabilities to quickly and reliably validate solutions built on Arm Compute Subsystems (CSS). The new ZeBu-200 and HAPS-200 hardware platforms will also assist our mutual customers in integrating Arm CSS into their designs with improved turnaround times to meet the demanding requirements for complex data center infrastructure and automotive systems.”

Kevork Kechichian

Executive Vice President, Solutions Engineering, Arm

“Verifying hardware for our highly anticipated rack-scale AMD Helios solution... demands scalable and versatile verification platforms. The Synopsys SW-defined, HAV capabilities with EP-Ready hardware are critical to how we perform CPU, GPU and AI subsystems verification as well as full-system validation... "

Alex Starr

Corporate Fellow, AMD

“SiFive has a very large and configurable portfolio of RISC-V CPU and AI core IP. We extensively test our IP using software workloads on HAPS, which means we can run trillions of cycles per day. As next generation CPUs and AI cores become larger and more complex, we need to efficiently map them onto larger and more powerful FPGAs. With its EP-Ready hardware HAPS-200 offers us an FPGA platform to do full system emulation for reference platforms that scale from small microcontrollers all the way to large scale data center designs.”

Albert Huntington

Vice President, Platform Engineering, SiFive

"AMD has used ZeBu EP solutions for fast emulation with software workloads for a number of years. The EP-ready Hardware concept has allowed us to switch on demand, as a design matures, to a prototyping use case and significantly increase workload throughput. ZeBu-200 and HAPS-200 EP-Ready systems will enable further performance improvements to accelerate design verification and software validation."

Alex Starr

Corporate Fellow, AMD